COG LCD Technology | Advantages, Structure

COG, or chip-on-glass, bonds the bare display driver die directly to the LCD glass with anisotropic conductive film and deletes the carrier board that would otherwise hold it. The module gets thinner, the border narrows, and the electrical path from driver to pixel shortens. It is also less forgiving to build, which is where most sourcing mistakes happen.

What the process replaces

A conventional module mounts the driver on an FR4 or polyimide carrier and links that carrier to the glass through a flexible tail. Every junction adds height, adds an interface and costs material. COG removes the carrier: the die is thinned, its gold bumps are aligned to ITO traces on the glass, and an ACF film bonds the two under heat and pressure. What remains between die and glass is a bond line measured in micrometres.

The rest of the stack collapses around it. Glass substrates are commonly supplied between 0.4 mm and 0.7 mm, the thinned die is comparable in thickness, and the optical films sit behind. Because nothing protrudes from the back of the glass, the backlight can be placed directly against it, without cut-outs for components or clearance for solder joints. Driver integration has followed the same trajectory as the rest of flat-panel electronics, where more of the system moves onto the display substrate itself^[2].

The bond interface

The electrical connection is mechanical. ACF is an epoxy matrix loaded with metal-coated polymer particles. Under pressure, particles trapped between a gold bump and an ITO pad flatten, their coating breaks, and a conductive bridge forms while the resin cures and holds the assembly. Conduction is vertical only, which is what allows fine pitch without shorting neighbouring pads.

Three parameters decide yield: bump coplanarity, particle deformation and alignment. If bumps vary in height, pressure concentrates on the tallest and the shortest sit on under-compressed particles, so contact resistance scatters across the die. If alignment drifts, effective contact area shrinks. Both show up as faint vertical banding or an intermittent column, which is why bonding equipment is specified by placement accuracy rather than throughput.

Sealing matters as much as bonding. The cured resin is the only barrier between biased ITO traces and ambient moisture, and a migration path across a humid interface will eventually open a connection. Edge sealant and a controlled bond-line fillet belong in the drawing, not in the process notes.

Thinner stack, narrower border

Deleting the carrier removes most of the driver-side height, and removing connectors removes the space needed to mate them. The more visible gain is the bottom border. A wire-bonded or connector-based design must reserve room for a tail bend and a socket; a COG design reserves room for the die width plus a seal margin, and the die is a long narrow strip.

That saving changes industrial design rather than the specification sheet: a larger active area in the same enclosure, or a smaller enclosure around the same active area. On instrument panels and handheld terminals, the narrow border is often the reason COG is chosen at all.

Electrical consequences

Short interconnects help signal integrity. The path from driver output to pixel electrode drops from centimetres of flex and connector to millimetres of ITO, reducing series inductance and the impedance discontinuities that cause reflections on fast parallel or MIPI lanes. Return paths stay close to the traces, so radiated emissions are usually easier to contain.

Two limits keep this honest. ITO is a comparatively resistive conductor, so on large panels the drop along row and column traces, not the bond, dominates brightness uniformity. And the bond itself has a contact resistance that varies with the number of captured particles per pad; a design that assumes an ideal connection will show column-to-column variation that no firmware can trim away.

Thermal expansion is the other consideration. Glass and silicon differ by a few parts per million per kelvin, so a long die on a wide glass strip accumulates shear at the end bumps as temperature swings. Die length, bump layout and cure profile are therefore chosen together, and qualification should include cycling across the rated range rather than a single room-temperature check.

Cost and yield

The bill of materials falls for a simple reason: one carrier, one connector and a set of passive parts disappear, and the flex tail becomes a signal carrier instead of a chip carrier. Process cost falls too, since paste printing, placement and reflow are replaced by one bonding step.

What rises is capital and discipline. ACF bonding lines, thermode tooling and inspection equipment are specialised, and rework is limited: a die bonded with insufficient particle deformation cannot be re-pressed indefinitely. Savings therefore depend on volume and first-pass yield. At low volume, or on a design likely to be re-spun, a carrier-based module can cost less overall even though its material cost is higher.

Reliability and qualification

Qualify the interface, not just the panel. Useful checks include thermal cycling between the rated extremes with contact resistance monitored in situ, damp heat with bias applied so that migration can occur if the seal is inadequate, and mechanical shock on both the bonded edge and the tail. Optical inspection after each stage catches delamination that electrical tests miss.

Ask for bond pull and peel data, the particle-deformation window used in production, and the sealing process. A supplier who quotes only panel specifications for a COG module has not described the part that fails.

When COG is the wrong choice

Three cases. Very high pin counts on large panels push bond pitch and die length past what ACF bonding handles comfortably, and chip-on-film becomes the practical route. Products that must be repaired in the field favour a replaceable carrier. And boards dissipating significant power near the driver benefit from spreading heat into copper rather than into glass.

For character and small graphic modules none of these usually applies, which is why COG dominates that segment.

Specifying a module

Define the active area and the largest border you can accept first; those two numbers decide whether the die fits. Then specify glass thickness, viewing direction, polariser treatment, backlight type, brightness at a stated measurement condition, interface and logic level, operating and storage temperature, and tail length with bend geometry. Add the mechanical tolerances your assembly depends on: outline, active-area offset, hole positions and flatness of the back surface.

Brightness is the specification most often quoted loosely. ISO 9241-307 sets out how luminance and contrast are measured on electronic displays^[1], so a value that names the instrument, the distance and the ambient condition is comparable to another supplier's value, and a bare number is not.

For standard formats, the COG LCD collection covers common sizes and pinouts, and the character LCD collection lists modules by character format. Where the project needs colour or video rates, TFT modules are the practical route, often built with the same bonding approach.

COG is a packaging decision with optical and mechanical consequences. The data that predicts success comes from the bond line, not from the panel datasheet.

References

1. ISO 9241-307:2008 — Ergonomics of human-system interaction — Part 307: Analysis and compliance test methods for electronic visual displays. International Organization for Standardization. https://www.iso.org/standard/40102.html
2. Hilsum, C. (2010). Flat-panel electronic displays: a triumph of physics, chemistry and engineering. Philosophical Transactions of the Royal Society A, 368(1914), 1027–1082. https://doi.org/10.1098/rsta.2009.0247